Learning Objectives
By the end of this lesson, you will be able to:
- Understand the differences between RISC and CISC processors
- Explain how interrupt handling works on CISC and RISC processors
- Show understanding of the importance of pipelining and registers in RISC processors
- Describe the four basic computer architectures: SISD, SIMD, MISD, MIMD
- Explain the characteristics of massively parallel computers
- Understand the concept of a virtual machine and give examples of their role
- Analyze the benefits and limitations of virtual machines
Key Terms
RISC and CISC Processors
The microprocessor, known as the Central Processing Unit (CPU), is the brain of the computer. It reads instructions from memory and performs tasks like basic logic, controlling, and input/output operations. The Instruction Set Architecture (ISA) is the set of basic instructions that the processor understands.
CISC Processors
- Uses complex, multi-step instructions
- Each instruction can perform multiple operations
- Design philosophy: complete tasks with fewer lines of code
- Example:
ADD A, B- single instruction that loads, adds, and stores - Minimizes instructions per program but increases cycles per instruction
RISC Processors
- Uses simple, single-cycle instructions
- Each instruction does one simple operation
- Design philosophy: make hardware simpler
- Example: Separate
LOAD,ADD,STOREinstructions - Increases instructions per program but reduces cycles per instruction
Real-Life Example: Smartphone vs Desktop
RISC processors (like ARM) are used in smartphones and tablets because they're power-efficient. Your phone's processor uses simple instructions to save battery life.
CISC processors (like x86) are used in desktop computers where power efficiency is less critical than performance for complex tasks like video editing or gaming.
Key Differences Between CISC and RISC
| CISC Features | RISC Features |
|---|---|
| Variable-length instructions | Fixed-length instructions |
| Many instruction formats | Smaller instruction sets |
| More addressing modes | Fewer addressing modes |
| Multi-cycle instructions | Single-cycle instructions |
| Complex instruction decoding | Simpler instruction decoding |
| Harder to implement pipelining | Easier to implement pipelining |
| Emphasis on hardware complexity | Emphasis on software simplicity |
Activity 1: Instruction Comparison
Compare how CISC and RISC would add two numbers (A=5, B=3):
CISC Approach
ADD A, B
Single instruction that loads, adds, and stores in multiple cycles
RISC Approach
LOAD X, A
LOAD Y, B
ADD X, Y
STORE Z
Four simple instructions, each taking one clock cycle
Explanation: CISC uses fewer instructions but each instruction takes multiple cycles. RISC uses more instructions but each takes only one cycle. RISC is more efficient for pipelining because each stage is simpler and more predictable.
Activity 2: Processor Selection
For each scenario, decide whether RISC or CISC would be more appropriate:
- A battery-powered smartwatch that needs to last 3 days on a single charge
- A desktop computer for professional video editing
- A portable gaming console
- A supercomputer for scientific simulations
- RISC - Better power efficiency for battery life
- CISC - Can handle complex instructions for video processing
- RISC - Balance of performance and battery life
- Depends - Modern supercomputers use both, often with specialized RISC-like designs for efficiency
Check Your Understanding
1. Why does CISC architecture use variable-length instructions?
Answer
To accommodate complex instructions with different numbers of operands. CISC instructions can have varying complexity and require different amounts of data, so variable-length instructions allow the processor to efficiently encode these complex operations.
2. Which processor type is more commonly found in portable devices like smartphones?
Answer
RISC processors. They are more power-efficient due to their simpler design and single-cycle instructions, which is critical for battery-powered devices like smartphones, tablets, and smartwatches.
3. What is the main design philosophy behind RISC processors?
Answer
Make hardware simpler. RISC processors use a reduced set of simple, single-cycle instructions that are easier and faster to execute. This simplicity allows for more efficient pipelining and better performance in many applications.
4. How does CISC architecture help reduce memory costs?
Answer
By reducing the number of instructions needed for programs. Since CISC instructions are more complex and can perform multiple operations, programs require fewer instructions overall. This means programs take up less memory space, which was important when memory was expensive.
5. Which processor type typically has faster execution time for individual instructions?
Answer
RISC processors. They use single-cycle instructions, meaning each instruction completes in one clock cycle. CISC instructions often require multiple cycles to complete their complex operations.
6. What advantage does RISC have for pipelining?
Answer
Easier to make pipelining function correctly. RISC's simple, fixed-length instructions that all take the same amount of time (one cycle) make it much easier to design an efficient pipeline. CISC's variable-length, multi-cycle instructions create challenges for pipelining.
Pipelining
Pipelining is a technique to improve computer performance by allowing several instructions to be processed simultaneously without waiting for previous instructions to complete. The execution of each instruction is split into five stages.
Pipeline Simulation
| Processor Stages | Clock Cycle 1 | Clock Cycle 2 | Clock Cycle 3 | Clock Cycle 4 | Clock Cycle 5 | Clock Cycle 6 | Clock Cycle 7 | Clock Cycle 8 | Clock Cycle 9 | Clock Cycle 10 |
|---|
Observation: In pipelining, multiple instructions can be in different stages at the same time. For example, while Instruction A is being executed, Instruction B is fetching operands, Instruction C is being decoded, and Instruction D is being fetched. This is like an assembly line in a factory.
Without pipelining: 6 instructions × 5 stages = 30 clock cycles
With pipelining: 6 instructions need only 10 clock cycles
Real-Life Example: School Cafeteria
Imagine a school cafeteria with 5 stations: 1) Get tray, 2) Choose main course, 3) Choose side dish, 4) Get drink, 5) Pay. Without pipelining, one student would complete all 5 stations before the next starts. With pipelining, 5 students can be at different stations simultaneously, serving everyone faster!
The Five Pipeline Stages
IF
Instruction Fetch
Get instruction from memory
ID
Instruction Decode
Understand what to do
OF
Operand Fetch
Get data needed
IE
Instruction Execute
Perform operation
WB
Writeback
Save the result
Performance Comparison
Without Pipelining: 6 instructions × 5 stages = 30 clock cycles
With Pipelining: 6 instructions need only 10 clock cycles (as shown in simulation)
Speedup = (Time without pipelining) / (Time with pipelining)
Speedup = 30 / 10 = 3x faster!
Interrupt Handling in Pipelining
When an interrupt occurs during pipelining, there could be multiple instructions in different stages. The usual approach is:
- Discard all instructions in the pipeline except the last one in the Writeback stage
- Apply the interrupt handler to the remaining instruction
- Once serviced, restart with the next instruction
- Alternative: Store contents of all five stages in registers to restore later
Activity 1: Pipeline Timing
Calculate how many clock cycles are needed for:
- 8 instructions without pipelining (5 stages each)
- 8 instructions with pipelining
- 12 instructions with pipelining
- Without pipelining: 8 × 5 = 40 cycles
- With pipelining: 5 + (8-1) = 12 cycles (first instruction takes 5 cycles, each additional takes 1)
- With pipelining: 5 + (12-1) = 16 cycles
Formula: Cycles with pipelining = Number of stages + (Number of instructions - 1)
Activity 2: Interrupt Scenario
During pipelining, an interrupt occurs when: - Instruction A is in Writeback stage - Instruction B is in Execute stage - Instruction C is in Operand Fetch stage - Instruction D is in Decode stage - Instruction E is in Fetch stage
What happens to each instruction when the interrupt is handled?
- Instruction A: Completes normally (already in Writeback)
- Instructions B, C, D, E: Discarded from the pipeline
- After interrupt: Processor handles interrupt, then restarts with next instruction (F)
Alternative approach: All stages could be saved in registers to restore after interrupt.
Check Your Understanding
1. What is the main advantage of pipelining?
Answer
Allows multiple instructions to be processed simultaneously. Pipelining splits instruction execution into stages so that different instructions can be in different stages at the same time, greatly improving processor throughput.
2. How many stages are in the standard pipeline model?
Answer
Five stages. IF (Instruction Fetch), ID (Instruction Decode), OF (Operand Fetch), IE (Instruction Execute), and WB (Writeback).
3. What does the "WB" stage stand for in pipelining?
Answer
Writeback. This is the final stage where the result of the instruction execution is written back to memory or registers.
4. If 10 instructions are processed with 5-stage pipelining, how many clock cycles are needed?
Answer
14 cycles. Formula: Cycles = Number of stages + (Number of instructions - 1) = 5 + (10 - 1) = 14.
5. What happens to instructions in the pipeline when an interrupt occurs?
Answer
All except the one in Writeback are discarded. The usual approach is to let the instruction in the Writeback stage complete, then discard all other instructions in the pipeline and handle the interrupt.
6. Which processor architecture is better suited for pipelining?
Answer
RISC processors. Their simple, fixed-length, single-cycle instructions make pipelining much easier to implement compared to CISC's variable-length, multi-cycle instructions.
Computer Architectures
There are four basic categories of computer architecture that describe how parallel processing can be carried out. These differ in how many instructions are executed and how many data sources are used.
SISD
Single Instruction
Single Data
SIMD
Single Instruction
Multiple Data
MISD
Multiple Instruction
Single Data
MIMD
Multiple Instruction
Multiple Data
SISD (Single Instruction Single Data)
- Single processor handles one instruction at a time
- Uses one data source at a time
- Tasks processed in sequential order
- No parallel processing
- Found in early personal computers
- Example: A basic calculator
SIMD (Single Instruction Multiple Data)
- Many processors execute same instruction
- Each processor uses different data inputs
- All doing same calculations on different data simultaneously
- Often called "array processors"
- Example: Graphics cards processing pixels
MISD (Multiple Instruction Single Data)
- Several processors use different instructions
- All use same shared data source
- Not commonly used
- MIMD tends to be used instead
- Example: Space Shuttle flight control system
MIMD (Multiple Instruction Multiple Data)
- Multiple processors with independent instructions
- Each processor can use data from separate sources
- Used in multicore systems
- Common in supercomputers
- Example: Modern multi-core CPUs
Real-Life Example: Photo Filter App
When you apply a filter to a photo on your phone:
- SISD: Process each pixel one by one (very slow!)
- SIMD: Apply the same filter to many pixels at once (like a graphics card does)
- MIMD: Different cores could handle different parts of the image simultaneously
Massively Parallel Computers
These have evolved from linking together many computers, forming one machine with several thousand processors. They're used to solve complex problems in science and mathematics.
- Each processor carries out part of the processing
- Communication via interconnected data pathways
- Different from cluster computers where each computer remains largely independent
- Example: Weather forecasting supercomputers
Activity 1: Architecture Identification
Identify which architecture (SISD, SIMD, MISD, MIMD) each scenario describes:
- A single-core computer running a word processor
- A graphics card adjusting brightness for all pixels in an image
- A multi-core server running different applications on different cores
- Four scientists analyzing the same dataset with different algorithms
- SISD: Single processor handling one task
- SIMD: Same operation (brightness adjustment) on multiple data items (pixels)
- MIMD: Multiple cores running different programs independently
- MISD: Multiple instructions (algorithms) on single data (dataset)
Activity 2: SIMD Application Design
Design an SIMD system to process a 1000×1000 pixel image (1 million pixels). Each pixel needs its color inverted (black becomes white, etc.).
How many processors would you use? How would the work be divided?
SIMD Solution:
- Use 1,000,000 small processors (one per pixel)
- Each processor executes the same instruction: "invert color"
- Each processor works on different data (its assigned pixel)
- All pixels processed simultaneously in parallel
- Total time = time to process one pixel (not 1 million pixels!)
In practice, graphics cards use SIMD with hundreds or thousands of processing cores.
Check Your Understanding
1. Which architecture uses many processors executing the same instruction on different data?
Answer
SIMD (Single Instruction Multiple Data). This architecture uses multiple processors that all execute the same instruction simultaneously but on different data items.
2. Which architecture is most common in modern multi-core processors?
Answer
MIMD (Multiple Instruction Multiple Data). Modern multi-core CPUs have multiple cores that can execute different instructions on different data simultaneously, which is the definition of MIMD.
3. What does MIMD stand for?
Answer
Multiple Instruction Multiple Data. In MIMD architecture, multiple processors can execute different instructions on different data simultaneously.
4. Where are SIMD processors commonly used?
Answer
Graphics cards. SIMD processors are excellent for graphics processing where the same operation (like applying a filter or transforming coordinates) needs to be applied to many pixels or vertices simultaneously.
5. How are massively parallel computers different from cluster computers?
Answer
Massively parallel computers have closer integration between processors. In massively parallel computers, processors work together more closely on shared problems with fast interconnections, while cluster computers are more independent systems connected by a network.
6. Which architecture was used in the American Space Shuttle flight control system?
Answer
MISD (Multiple Instruction Single Data). The Space Shuttle used multiple processors running different algorithms on the same sensor data for redundancy and error checking.
Virtual Machines
A Virtual Machine (VM) is software, not hardware, that emulates the hardware of a real computer system. The most common type is the System Virtual Machine which creates a virtual computer within your physical computer.
Virtual Machine Architecture
Observation: The virtual machine creates a complete computer system within software. The hypervisor manages multiple virtual machines, ensuring they're protected from each other while running on the same physical hardware.
Guest Operating System
- OS running inside the virtual machine
- Controls the virtual hardware during emulation
- Running under control of the host OS software
- Believes it's running on real hardware
Host Operating System
- OS controlling the actual physical hardware
- Normal OS for the host/physical computer
- Runs and monitors the virtual machine software
- Manages resources between VMs
Real-Life Example: Running Windows on a Mac
If you have a Mac (macOS) but need to run a Windows program, you can use a virtual machine:
- Host OS: macOS (on your actual Mac)
- Virtual Machine Software: VMware or Parallels
- Guest OS: Windows (running inside the VM)
- Application: Your Windows program runs inside the Windows VM
Benefits of Virtual Machines
- Guest OS can run without impacting anything outside the VM
- Run apps not compatible with host OS by using compatible guest OS
- Use old software on new systems by emulating old OS
- Test new OS or apps safely without crashing host computer
- Multiple OS can run simultaneously on same hardware
Limitations of Virtual Machines
- Performance is slower than running on original system
- Building in-house VMs can be expensive for large companies
- Complex to manage and maintain
- Requires extra resources (RAM, CPU, storage)
- Some hardware features may not be available to guest OS
Activity 1: VM Scenario Analysis
A company has a Windows application that only works on Windows 7. Their new computers run Windows 11. How can virtual machines help?
List the components needed and explain how they would work together.
VM Solution:
- Host OS: Windows 11 (on new computers)
- Virtual Machine Software: VMware, VirtualBox, or Hyper-V
- Guest OS: Windows 7 (installed inside VM)
- Application: Runs inside Windows 7 VM
The old application runs in Windows 7 as if it were on actual Windows 7 hardware, while the actual computer runs Windows 11.
Activity 2: Benefits vs Limitations
A school wants to use virtual machines to let students try different operating systems (Linux, Windows, macOS) on the same computer lab PCs.
List 3 benefits and 3 limitations of this approach for the school.
Benefits:
- Cost saving - only need one set of hardware instead of separate computers for each OS
- Flexibility - students can quickly switch between OS without rebooting
- Safety - if students crash the VM, host computer remains unaffected
Limitations:
- Performance - VMs run slower than native OS, especially with multiple VMs
- Complexity - IT staff need to manage and maintain VM software
- Licensing - May need separate licenses for each guest OS
Check Your Understanding
1. What is a virtual machine?
Answer
Software that emulates hardware. A virtual machine is a software program that creates a virtual computer system with its own virtual CPU, memory, storage, and network interfaces, allowing it to run an operating system and applications as if it were a physical computer.
2. Which component creates and manages virtual machines?
Answer
Hypervisor (also called Virtual Machine Software). The hypervisor is the software layer that creates, runs, and manages virtual machines. It sits between the host operating system (or hardware) and the guest operating systems.
3. What is the main benefit of using virtual machines for testing software?
Answer
Won't crash host computer if something goes wrong. Since the virtual machine is isolated from the host system, any crashes, malware, or configuration errors within the VM don't affect the underlying host computer, making it safe for testing.
4. What is a key limitation of virtual machines?
Answer
You don't get same performance as original system. Virtual machines have performance overhead because the guest OS and applications run on emulated hardware through the hypervisor layer, which adds processing overhead compared to running directly on physical hardware.
5. How can virtual machines help with old software compatibility?
Answer
By running a compatible guest OS as a virtual machine. If you have old software that only works on an older operating system (like Windows 7), you can create a virtual machine with that older OS and run the software inside it, even on a modern computer with a newer OS.
6. Which OS controls the actual physical hardware?
Answer
Host OS. The host operating system is installed directly on the physical computer hardware and manages all hardware resources. Virtual machines run on top of the host OS (or directly on the hypervisor) and only see virtualized hardware.
Key Takeaways
- CISC processors use complex, multi-step instructions to minimize code size but increase cycles per instruction
- RISC processors use simple, single-cycle instructions to make hardware simpler and improve pipelining
- Pipelining splits instruction execution into stages (IF, ID, OF, IE, WB) to process multiple instructions simultaneously
- SISD architecture uses one processor for one instruction on one data source (sequential processing)
- SIMD architecture uses many processors executing the same instruction on different data (parallel processing)
- MIMD architecture uses multiple processors with independent instructions and data (common in multicore systems)
- Massively parallel computers link thousands of processors to solve complex scientific problems
- Virtual machines are software that emulates hardware, allowing multiple OS to run on one computer
- Guest OS runs inside the VM, while Host OS controls the actual physical hardware
- VM benefits include compatibility, testing safety, and running multiple OS simultaneously
- VM limitations include performance overhead and management complexity
- RISC is better for pipelining and power efficiency (used in mobile devices), while CISC can handle complex operations more efficiently in some cases
Question Bank
1. Complete these statements about computer processors. [3 marks]
Marking Scheme & Answer
A processor with a few simple fixed-length instructions that have a small number of instruction formats is called a RISC / reduced instruction set computer processor.
A processor with many complex variable-length instructions that has many instruction formats is called a CISC / complex instruction set computer processor.
Instruction-level parallelism, applied to the execution of instructions during the fetch-execute cycle, is called pipelining.
2. Complete these statements about a virtual machine. [4 marks]
Marking Scheme & Answer
A virtual machine is software / a program that emulates a physical / different computer system.
A virtual machine allows multiple guest operating systems to run on one computer using a host operating system.
3. Explain the key differences between RISC and CISC processors. [6 marks]
Marking Scheme & Answer
RISC Features:
- Simple, fixed-length instructions
- Single-cycle instructions
- Smaller instruction sets
- Fewer addressing modes
- Easier pipelining
- Design emphasis on software
CISC Features:
- Complex, variable-length instructions
- Multi-cycle instructions
- Many instruction formats
- More addressing modes
- Harder to implement pipelining
- Design emphasis on hardware
Additional points: RISC reduces cycles per instruction but increases instructions per program. CISC minimizes instructions per program but increases cycles per instruction. RISC is more power-efficient (used in mobile devices).
4. Describe how pipelining improves processor performance. [5 marks]
Marking Scheme & Answer
- [1 mark] Splits instruction execution into stages (IF, ID, OF, IE, WB)
- [1 mark] Allows multiple instructions to be processed simultaneously
- [1 mark] Different stages can work on different instructions at the same time
- [1 mark] No need to wait for one instruction to complete before starting next
- [1 mark] Example: 6 instructions take 10 cycles with pipelining vs 30 without
- [Additional] Like an assembly line in a factory - multiple items being worked on simultaneously
5. Compare SISD, SIMD, and MIMD architectures. [6 marks]
Marking Scheme & Answer
SISD:
- Single Instruction Single Data
- One processor, sequential
- Early personal computers
- No parallel processing
SIMD:
- Single Instruction Multiple Data
- Many processors, same instruction
- Different data simultaneously
- Graphics cards, array processors
MIMD:
- Multiple Instruction Multiple Data
- Multiple independent processors
- Different instructions and data
- Multi-core systems, supercomputers
Key difference: SISD has no parallelism, SIMD has data parallelism (same operation on multiple data), MIMD has task parallelism (different operations on different data).
6. Explain three benefits and two limitations of virtual machines. [5 marks]
Marking Scheme & Answer
Benefits (any three):
- Run apps not compatible with host OS
- Use old software on new systems
- Test new OS/apps safely without crashing host
- Multiple OS can run simultaneously
- Guest OS is isolated/protected from host
Limitations (any two):
- Slower performance than original system
- Expensive to build/maintain for large companies
- Complex to manage and maintain
- Requires extra resources (RAM, CPU)
7. Describe how interrupt handling works in a pipelined processor. [4 marks]
Marking Scheme & Answer
- [1 mark] When interrupt occurs, multiple instructions may be in pipeline
- [1 mark] Usual approach: discard all instructions except last in Writeback stage
- [1 mark] Apply interrupt handler to remaining instruction
- [1 mark] After servicing interrupt, restart with next instruction
- [Alternative] Contents of five stages can be stored in registers to restore later
8. Why is RISC architecture considered an improvement over CISC? [3 marks]
Marking Scheme & Answer
- [1 mark] Less complicated set of instructions makes CPU design easier, cheaper, quicker
- [1 mark] Better suited for pipelining (simpler, single-cycle instructions)
- [1 mark] More power-efficient (used in portable devices)
- [Additional] Faster execution time for individual instructions
9. What are massively parallel computers and how are they used? [4 marks]
Marking Scheme & Answer
- [1 mark] Formed by linking many computers together
- [1 mark] One machine with several thousand processors
- [1 mark] Each processor carries out part of processing
- [1 mark] Used to solve complex problems in science and mathematics
- [Additional] Different from cluster computers - closer integration between processors
10. How would you use a virtual machine to test an application with three different operating systems? [5 marks]
Marking Scheme & Answer
- [1 mark] Install virtual machine software on host computer
- [1 mark] Create three virtual machines (one for each OS)
- [1 mark] Install different guest OS on each VM (OS1, OS2, OS3)
- [1 mark] Install application on each guest OS
- [1 mark] Test application simultaneously on all three OS using same hardware
- [Additional] Virtual machine software translates instructions and provides hardware emulation